AMX Codec Master Control System Dokumentacja Pobierz pdf (Strona 5)

SLAA154

Interfacing the TLV320AIC12/13/14/15 Codec to the TMS320C5402™ DSP 5

'C54xxDSP

McBSP

BCLKR

BCLKX

BFSR

BFSX

BDR

BDX

CLKOUT

'AIC12#0

DIN

DOUT

SCLK

SMARTDM Port

SCL

SDA

Host Port

MCLK

FSD

M/S

RESET

PWRDN

DVDD

DVSS

IOVDD

IOVSS

Digital

Analog

Other Clock Source

IOVDD

'AIC12#1

DIN

DOUT

SCLK

SMARTDM Port

SCL

SDA

Host Port

MCLK

FSD

M/S

RESET

PWRDN

DVDD

DVSS

IOVDD

IOVSS

Digital

Analog

10K10K

IOVDD

10K

Reset Command

Power Down Command

{

I2CmasterorS2C

10K

IOVDD

10K

Figure 2. Typical AIC12/C54xx™ DSP Digital Interface, Two-AIC12 Cascade Mode

1 2 3 4 5 6 7 8 9 10 ... 14 15

TMS320C5402™ DSP 1
1 Introduction 2
2HardwareSystem 3
3 Software Interface 4
Host Port 5
SMARTDM Port 5
3.2 Analog Interface 6
3.2.1 Analog Inputs 6
3.2.2 Analog Outputs 6
3.3 Digital Interface 6
D15 through D1 D0 8
D15 through D0 8
D15-D13 0 D11 111 D7-D0 9
D15-D13 1 0 111 D7-D0 9
D15-D12 D11-D9 0 D7-D0 9
4 Design Issues 10
5 Test Procedure for AIC12 11
5.3 AIC12 EVM Board 12
6 References 13

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